@@ -366,8 +366,8 @@ impl_from_bits_!(
366366
367367#[ allow( improper_ctypes) ]
368368extern "C" {
369- #[ cfg ( target_arch = "aarch64" ) ]
370- #[ link_name = "llvm.aarch64 .neon.frsqrte .v2f32" ]
369+ #[ cfg_attr ( target_arch = "aarch64" , link_name = "llvm.aarch64.neon.frsqrte.v2f32 ") ]
370+ #[ cfg_attr ( target_arch = "arm" , link_name = "llvm.arm .neon.vrsqrte .v2f32" ) ]
371371 fn frsqrte_v2f32 ( a : float32x2_t ) -> float32x2_t ;
372372}
373373
@@ -724,11 +724,10 @@ pub unsafe fn vmovl_u32(a: uint32x2_t) -> uint64x2_t {
724724}
725725
726726/// Reciprocal square-root estimate.
727- #[ cfg( target_arch = "aarch64" ) ]
728- // FIXME (https://github.com/rust-lang-nursery/stdsimd/issues/383)
729727#[ inline]
730728#[ target_feature( enable = "neon" ) ]
731- #[ cfg_attr( test, assert_instr( frsqrte) ) ]
729+ #[ cfg_attr( all( test, target_arch = "aarch64" ) , assert_instr( frsqrte) ) ]
730+ #[ cfg_attr( all( test, target_arch = "arm" ) , assert_instr( vrsqrte) ) ]
732731pub unsafe fn vrsqrte_f32 ( a : float32x2_t ) -> float32x2_t {
733732 frsqrte_v2f32 ( a)
734733}
@@ -1022,7 +1021,6 @@ mod tests {
10221021 assert_eq ! ( r, e) ;
10231022 }
10241023
1025- #[ cfg( target_arch = "aarch64" ) ]
10261024 #[ simd_test = "neon" ]
10271025 unsafe fn test_vrsqrt_f32 ( ) {
10281026 let a = f32x2:: new ( 1.0 , 2.0 ) ;
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